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WP's Trigger


Delay trigger

Early the circuit was originally designed as analogue delay device for trigger signals. With sufficient short adjusted delay times it can be used to manipulate Sync signals, too. It is based on the standard logic IC 74HC123 »Dual retriggerable monostable multivibrator with reset«.


Phase shifting circuit
Phase shifter (delay trigger)

Basic function

A pulse at the input is released at the output delayed with T1 = k × R1 × C1 and lasting T2 = k × R2 × C2. T2 lengthen a short pulse enabling reaction of the device to be controlled. With sufficient short T1 + T2 the circuit can be used as delay device for sync signals as well.
Typical values: R1, R2 = 2 kOhm to 1 MOhm; C1, C2 = 0 to several µF; Rs = 1 kOhm at the diodes of the opto couplers, some 10 kOhm at the inputs 1|A and 1B. Possibly one has to select the shunt resistors at the input IN L to fit to the trigger/sync source and perhaps one has to bridge the white outlined one. (Factor k is depending of the IC family and the manufacturer. Its value is about 0.55.)


Additional functions

Some extensions are integrated in the circuit: At the output OUT H always a control signal with rising edge is available and OUT L always offers one with falling edge (exact short circuit). So one can convert an input signal. Only one input channel, however, can be used at a time, IN L with short circuit or falling edge signals and IN H with rising edge signals. The unused input of the 74HC123 must be set to a certain potential, 1|A to GND and 1B to +5 V. Therefore a double (coupled) switch is designed in. If one exclusively uses one input, the other one can be soldered to the certain potential making the switch not necessary.



The opto couplers provide protection for the 74HC123. One, however, can feed in the signals directly, but then one should it put into a socket. The most secure and preferred path is IN H to OUT L, because it is potential free. Suitable opto couplers at the input (shunt resistor in the diode branch!) offer the possibility to work with signal sources different from 5 V, e.g. at a PLC with 24 V.
The resistors Rs are used for current limitation reasons or as drain path in switching processes. The diodes parallel to R1 and R2 are used to discharge big C1 and C2 after (fast) power down and protect the 74HC123.



One can gain the +5 V e.g. inside the PC from the four pole floppy or harddisk drive power connector (white housing; red cable = +5 V, black cable = GND) or outside of it from a suitable interface connector (USB, ...).


Additional options

Selecting potentiometers instead of the certain resistors R1 and R2 offers the variable setting of delay times.
Setting the reset inputs 1|R and 2|R not fixed to +5 V but with switching capability from GND to +5 V one gets some kind of safety device (trigger enable). Not before these inputs are switched to +5 V the IC is active and waits for the real input signal.
The inputs could be extended by Schmitt triggers to do signal conditioning. And some status LEDs would complete the device.


Trigger device

Trigger device
Low ohms path in the trigger device

Especially one additional word about triggering with falling etch: The system to be triggered usually awaits a fast voltage drop caused by the trigger source. This means the trigger source has at least to hold the voltage first until it drops. This drop should be caused by a low resistance path in the trigger source.
Connecting a battery and then simply de-plug the wires will not work. Because when a trigger input channel should already react on a maker (short circuit, e.g. with a paper clip), then it has to be pre-charged inside the system.
One can measure this voltage, e.g. 5 V in case of common TTL level, with a multi-meter, because its high internal resistance does not release the trigger. Such an input channel can cover both cases, with or without external voltage.
The reverse equivalent is valid for triggering with rising edge. Always important is the transition towards a short circuit (falling edge) or away from it (rising edge). Spoken in very simple terms: an additional externally supplied voltage is just ignored from case to case.

Just an addition to trigger points and delay times: In TTL technology a level above 2.2 V is interpreted as HIGH and a level below 0.8 V as LOW. Switching times - and given delay times - can use this scheme, but need not. Thus there is e.g. the 10%/90% way - below 10% full level LOW and 90% full level HIGH, resp. - or 50% - half full level - as start points.
And there are even current loop controlled devices, ...


Special cases

Synchronous trigger

Eventually it can pay to synchronize the trigger signal to the system clock. For instance by holding the trigger pulse in a flip flop (e.g. a D-Latch), using its output pins ANDed with the system clock (AND gate) as valid trigger signal further on.


Propagation delay

Eventual delays due to limited spreading speeds of signals can usually be ignored. A rule of thumb - the speed of signals in wires is about 2/3 speed of light, thus about 0.2 m (~2/3 feet) in a nanosecond or 200 m (~220 yards) in a microsecond.
Even gate delays of electronic devices easily lie within this region. Usually nanoseconds.




©WP (1998 -) 2012
Update: V8.4, 2012-03-02